Thanks! The only Canadian entity that I recognize in RISC V International is UWO... At this point I see an extremely good future for the RISC-V in embedded systems but a REALLY long wait for it to challenge anywhere in complex CPU space. - Evan On Sun, Feb 4, 2024 at 5:16 PM Scott Allen <mlxxxp@gmail.com> wrote:
On Sun, 4 Feb 2024 at 16:53, Evan Leibovitch via talk <talk@gtalug.org> wrote:
If the RISC-V design is open source, what is SiFive selling?
RISC-V is an Instruction Set Architecture (ISA) - the binary code that an assembler or compiler creates and is loaded and executed on a CPU. The hardware design of the CPU that actually executes those instructions can remain proprietary.
-- Scott
-- Evan Leibovitch, Toronto Canada @evanleibovitch / @el56