On Tue, May 10, 2022 at 9:19 AM Stewart C. Russell via talk <talk@gtalug.org> wrote:
On 2022-05-10 08:12, Ivan Avery Frey via talk wrote:
"RISC-V chip designed with open source tools - eeNews Europe"
https://www.eenewseurope.com/en/risc-v-chip-designed-with-open-source-tools/
< https://www.eenewseurope.com/en/risc-v-chip-designed-with-open-source-tools/
Ah, neat. Wonder how long it'll be before there are competitive RISC-V general purpose CPUs?
Attend tonight's talk and find out :-)
The only RISC-V I have is a WEMOS D1 Mini C3 —
https://universal-solder.ca/product/wemos-d1-mini-c3-v1-0-0-esp32-c3fh4-genu... . An impressive little thing, but still not up to running much more than MicroPython.
cheers, Stewart --- Post to this mailing list talk@gtalug.org Unsubscribe from this mailing list https://gtalug.org/mailman/listinfo/talk